1. Field of the Invention
The present invention relates to a magnetic random access memory (hereinafter, referred to as “MRAM”). The present invention relates particularly to a technique for making it possible to write data into a memory cell of MRAM by means of a smaller write current.
2. Description of the Related Art
An MRAM has become a key device as a nonvolatile memory which can be written at a high speed and can be rewritten a large number of times.
As shown in FIG. 1, a typical memory cell of MRAM comprises a magnetoresistance element composed of a pin layer 101 having a fixed spontaneous magnetization, a free layer 102 having an invertible spontaneous magnetization and a non-magnetic spacer layer 103 provided between the pin layer 101 and the free layer 102. The free layer 102 is formed so that the direction of its spontaneous magnetization is allowed to be parallel or anti-parallel with the direction of spontaneous magnetization of the pin layer 101.
The memory cell stores data of one bit as the direction of spontaneous magnetization of the free layer 102. The memory cell can take two states including a “parallel” state where the spontaneous magnetization of the free layer 102 and the spontaneous magnetization of the pin layer 101 are parallel with each other and an “anti-parallel” state where the spontaneous
magnetization of the free layer 102 and the spontaneous magnetization of the pin layer 101 are anti-parallel with each other. The memory cell stores data of one bit by making one of the “parallel” state and the “anti-parallel” state correspond to “0” and making the other correspond to “1”.
A read operation of data from the memory cell is performed by detecting the change in resistance of the memory cell caused by a magnetoresistance effect. The directions of spontaneous magnetization in the pin layer 101 and the free layer 102 have an influence on the resistance of a memory cell. In case that the directions of spontaneous magnetization of the pin layer 101 and the free layer 102 are parallel with each other, the resistance of the memory cell has a first value R, and in case that they are anti-parallel with each other, the resistance of the memory cell has a second value “R+ΔR”. The directions of spontaneous magnetization of the pin layer 101 and the free layer 102 enable data stored in a memory cell to be detected by the resistance of the memory cell.
A write operation of data into a memory cell is performed by making a write current flow in a word line and a bit line provided in a memory cell array and inverting the direction of spontaneous magnetization of the free layer 102 by means of a magnetic field generated by said write current.
The reduction of a write current necessary for writing data is important from the viewpoint of reducing the power consumption of MRAM. A technique of reducing a write current has been disclosed in Japanese published application 2002-110938A. In this application, a magnetic field is concentrated at a magnetoresistance element by joining a high-saturation magnetization soft magnetic material or a metal-nonmetal nano-granular film to a signal line in which a write current is made to flow, and thereby a write current is reduced.
Another MRAM having a structure for reducing a write current has been disclosed in U.S. Pat. No. 5,732,016. In the MRAM disclosed in this patent, a coil is used as a wiring in which a write current is made to flow, and a magnetoresistance element is inserted in the coil. Since a magnetic field to be applied to the magnetoresistance element is in proportion to the number of turns of the coil, a write operation can be performed by means of a smaller write current.
Other MRAMs having a structure for reducing a write current have been disclosed in U.S. Pat. No. 6,236,590 and Japanese Patent application 2002-118239. In the MRAM disclosed in U.S. Pat. No. 6,236,590, the width of a conductor in which a write current is made to flow is made smaller than the width of the data storage layer. By making small the width of a conductor in which a write current is made to flow, the misalignment between the conductor and the data storage layer is prevented and the leakage of a magnetic field generated by a write current is reduced and therefore a write operation can be performed by means of a smaller write current.
Furthermore, another technique has been disclosed in Japanese published application 2000-82283A. In a magnetic storage device disclosed in 2000-82283A, a structure having a coupling control layer disposed between two magnetic layers is used. One of the two magnetic layers is used as a storage carrier. In the both magnetic layers, a driving line is provided in a direction parallel with the direction of spontaneous magnetization possessed by the magnetic layers. In case that a write operation of data into the storage carrier is performed, an electric current is made to flow in the driving line and a magnetic field is applied in a direction perpendicular to the direction of spontaneous magnetization possessed by the magnetic layer used as a storage carrier. The inversion of the spontaneous magnetization possessed by the magnetic layer used as a carrier is made selectively easy. The inversion of the spontaneous magnetization possessed by the magnetic layer used as a storage carrier is performed by an exchange interaction acting on the two magnetic layers through the coupling control layer. The driving line in which an electric current is made to flow at the time of a write operation of data is formed so as to be curved upward.